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» A Structural Approach for Transistor Circuit Synthesis
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ICCAD
1999
IEEE
96views Hardware» more  ICCAD 1999»
14 years 26 days ago
Implication graph based domino logic synthesis
In this paper, we present a new approach to the problem of inverter elimination in domino logic synthesis. A small piece of static CMOS logic is introduced to the circuit to avoid...
Ki-Wook Kim, C. L. Liu, Sung-Mo Kang
ICCAD
1999
IEEE
120views Hardware» more  ICCAD 1999»
14 years 26 days ago
Regularity extraction via clan-based structural circuit decomposition
Identifying repeating structural regularities in circuits allows the minimization of synthesis, optimization, and layout e orts. We introduce in this paper a novel method for ident...
Soha Hassoun, Carolyn McCreary
DFT
2005
IEEE
83views VLSI» more  DFT 2005»
14 years 2 months ago
An ILP Formulation for Yield-driven Architectural Synthesis
Data flow graph dominant designs, such as communication video and audio applications, are common in today’s IC industry. In these designs, the datapath resources (e.g., adders,...
Zhaojun Wo, Israel Koren, Maciej J. Ciesielski
CODES
2009
IEEE
14 years 3 months ago
A variation-tolerant scheduler for better than worst-case behavioral synthesis
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
Jason Cong, Albert Liu, Bin Liu
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
14 years 3 days ago
LOT: logic optimization with testability-new transformations using recursive learning
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...