61 search results - page 8 / 13 » A Structural Approach for Transistor Circuit Synthesis |
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
A new approach in hierarchical optimisation is presented which is capable of optimising both the performance and yield of an analogue design. Performance and yield trade offs are ...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
It is likely that it will become increasingly difficult to manufacture the complex, heterogeneous logic structures that characterise current reconfigurable logic systems. As a res...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...