153 search results - page 1 / 31 » A Study of Design Efficiency with a High-Level Language for ... |
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
TRETS
2010
13 years 6 months ago
2010
s, and abstractions, typically enabling faster development times than with traditional Hardware ion Languages (HDLs). However, programming at a higher level of abstraction is typic...
TCAD
2011
13 years 2 months ago
2011
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
FCCM
2008
IEEE
14 years 2 months ago
2008
IEEE
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
ERSA
2007
13 years 9 months ago
2007
”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, ...