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» A Study on Impact of Leakage Current on Dynamic Power
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TVLSI
2010
13 years 2 months ago
A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
Hamed F. Dadgour, Kaustav Banerjee
CSREAESA
2006
13 years 9 months ago
Energy Optimization for Application-Specific NOC with Multi-Mode Switches
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. As technology scales to deep sub-...
Kuei-Chung Chang
COMSWARE
2006
IEEE
14 years 1 months ago
Impact of video encoding parameters on dynamic video transcoding
Currently there are a wide variety of devices with different screen resolutions, color support, processing power, and network connectivity, capable of receiving streaming video fr...
Vidyut Samanta, Ricardo V. Oliveira, Advait Dixit,...
HPCA
2009
IEEE
14 years 2 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes
SOCC
2008
IEEE
121views Education» more  SOCC 2008»
14 years 1 months ago
Low power 8T SRAM using 32nm independent gate FinFET technology
In this paper, new SRAM cell design methods for FinFET technology are proposed. One of the most important features of FinFET is that the independent front and back gate can be bia...
Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi