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    TCAD
    2008
    181views more  TCAD 2008»
    A Survey of Automated Techniques for Formal Software Verification
    13 years 11 months ago
    A Survey of Automated Techniques for Formal Software Verification
    Download  www.csee.usf.edu
    The quality and the correctness of software is often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a design is free of specific...
    Vijay D'Silva, Daniel Kroening, Georg Weissenbache...
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    BELL
    2000
    107views more  BELL 2000»
    Automating software feature verification
    13 years 11 months ago
    Automating software feature verification
    Download  spinroot.com
    A significant part of the call processing software for Lucent's new PathStar access server [FSW98] was checked with automated formal verification techniques. The verification...
    Gerard J. Holzmann, Margaret H. Smith
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    ISICT
    2003
    165views Information Technology» more  ISICT 2003»
    On the automated implementation of modal logics used to verify security protocols
    14 years 17 days ago
    On the automated implementation of modal logics used to verify security protocols
    Download  www.ece.ul.ie
    : Formal verification provides a rigid and thorough means of evaluating the correctness of cryptographic protocols so that even subtle defects can be identified. As the application...
    Tom Coffey, Reiner Dojen, Tomas Flanagan
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    CSIE
    2009
    IEEE
    156views Theoretical Computer Science» more  CSIE 2009»
    On Test Script Technique Oriented Automation of Embedded Software Simulation Testing
    14 years 8 days ago
    On Test Script Technique Oriented Automation of Embedded Software Simulation Testing
    Download  lutpii.students-blog.undip.ac.id
    Succinct test script with high efficiency is one of key point for automation of embedded software testing. In this paper, we integrated object technique with automated simulation ...
    Yongfeng Yin, Bin Liu, Bentao Zheng
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    DAC
    2006
    ACM
    147views Computer Architecture» more  DAC 2006»
    Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
    15 years 4 days ago
    Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
    Download  people.cs.ubc.ca
    Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
    Xiushan Feng, Alan J. Hu
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