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VLSID
2004
IEEE
119views VLSI» more  VLSID 2004»
14 years 8 months ago
Bridge Over Troubled Wrappers: Automated Interface Synthesis
System-on-Chip (SoC) design methodologies rely heavily on reuse of intellectual property (IP) blocks. IP reuse is a labour intensive and time consuming process as IP blocks often ...
Vijay D'Silva, S. Ramesh, Arcot Sowmya
VTS
1999
IEEE
106views Hardware» more  VTS 1999»
14 years 2 days ago
RT-level TPG Exploiting High-Level Synthesis Information
High-level test pattern generation is today a widely investigated research topic. The present paper proposes a fully automated, simulation-based ATPG system, to address test patte...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto
CF
2007
ACM
13 years 11 months ago
Automated generation of layout and control for quantum circuits
We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we in...
Mark Whitney, Nemanja Isailovic, Yatish Patel, Joh...
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 4 months ago
Leveraging protocol knowledge in slack matching
Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, t...
Girish Venkataramani, Seth Copen Goldstein
DAC
2007
ACM
13 years 11 months ago
Integrated Droplet Routing in the Synthesis of Microfluidic Biochips
Microfluidic biochips are revolutionizing many areas of biochemistry and biomedical sciences. Several synthesis tools have recently been proposed for the automated design of bioch...
Tao Xu, Krishnendu Chakrabarty