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» A System Level Resource Estimation Tool for FPGAs
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ICCAD
2000
IEEE
159views Hardware» more  ICCAD 2000»
14 years 3 months ago
ACTIF: A High-Level Power Estimation Tool for Analog Continuous-Time-Filters
A tool is presented that gives a high-level estimation of the power consumed by an analog continuous-time OTA-C filter when given only high-level input parameters such as dynamic ...
Erik Lauwers, Georges G. E. Gielen
FPL
2010
Springer
124views Hardware» more  FPL 2010»
13 years 8 months ago
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
DATE
2002
IEEE
100views Hardware» more  DATE 2002»
14 years 3 months ago
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
DFT
1999
IEEE
125views VLSI» more  DFT 1999»
14 years 3 months ago
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
John Lach, William H. Mangione-Smith, Miodrag Potk...
FPL
2008
Springer
138views Hardware» more  FPL 2008»
14 years 9 days ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...