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» A Systematic Approach for Designing Testable VLSI Circuits
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DSD
2009
IEEE
111views Hardware» more  DSD 2009»
14 years 2 months ago
Robustness Check for Multiple Faults Using Formal Techniques
Feature sizes in VLSI circuits are steadily shrinking. This results in increasing susceptibility to soft errors, e.g. due to environmental radiation. Precautions against soft error...
Stefan Frehse, Görschwin Fey, André S&...
IFIP
1992
Springer
13 years 11 months ago
Controller Implementation by Communicating Asynchronous Sequential Circuits Generated from a Petri Net Specification of Required
This paper presents a completely systematic design procedure for asynchronous controllers. The initial step is the construction of a signal transition graph (STG, an interpreted P...
Jochen Beister, Ralf Wollowski
FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
14 years 4 hour ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings
ISVLSI
2008
IEEE
142views VLSI» more  ISVLSI 2008»
14 years 2 months ago
A Fuzzy Approach for Variation Aware Buffer Insertion and Driver Sizing
In nanometer regime, the effects of process variations are dominating circuit performance, power and reliability of circuits. Hence, it is important to properly manage variation e...
Venkataraman Mahalingam, Nagarajan Ranganathan
APIN
2002
121views more  APIN 2002»
13 years 7 months ago
Applying Learning by Examples for Digital Design Automation
This paper describes a new learning by example mechanism and its application for digital circuit design automation. This mechanism uses finite state machines to represent the infer...
Ben Choi