36 search results - page 6 / 8 » A Systematic Approach for Diagnosing Multiple Delay Faults |
VTS
2007
IEEE
14 years 1 months ago
2007
IEEE
—As the complexity of the integrated circuits increases, they become more susceptible to manufacturing faults, decreasing the total process yield. Thus, it would be desirable to ...
DSD
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper we present an approach for the mapping optimization of fault-tolerant embedded systems for safetycritical applications. Processes and messages are statically schedul...
VTS
2002
IEEE
14 years 15 days ago
2002
IEEE
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
CCGRID
2006
IEEE
14 years 1 months ago
2006
IEEE
With the increasing number of processors in modern HPC(High Performance Computing) systems, there are two emergent problems to solve. One is scalability, the other is fault tolera...
ISQED
2010
IEEE
13 years 9 months ago
2010
IEEE
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...