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» A Test Point Insertion Algorithm for Mixed-Signal Circuits
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JCP
2006
92views more  JCP 2006»
13 years 7 months ago
A Novel Pulse Echo Correlation Tool for Transmission Path Testing and Fault Diagnosis
Abstract-- In this paper a novel pulse sequence testing methodology is presented [22] as an alternative to Time Domain Reflectometry (TDR) for transmission line health condition mo...
David M. Horan, Richard A. Guinee
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
14 years 13 days ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
FCT
1991
Springer
13 years 11 months ago
Lattice Basis Reduction: Improved Practical Algorithms and Solving Subset Sum Problems
We report on improved practical algorithms for lattice basis reduction. We propose a practical oating point version of the L3{algorithm of Lenstra, Lenstra, Lovasz (1982). We pres...
Claus-Peter Schnorr, M. Euchner
ISMB
2000
13 years 8 months ago
Pattern Recognition of Genomic Features with Microarrays: Site Typing of Mycobacterium Tuberculosis Strains
Mycobacterium tuberculosis (M. tb.) strains differ in the number and locations of a transposon-like insertion sequence known as IS6110. Accurate detection of this sequence can be ...
Soumya Raychaudhuri, Joshua M. Stuart, Xuemin Liu,...
ICCAD
2009
IEEE
117views Hardware» more  ICCAD 2009»
13 years 5 months ago
Binning optimization based on SSTA for transparently-latched circuits
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
Min Gong, Hai Zhou, Jun Tao, Xuan Zeng