264 search results - page 29 / 53 » A Time Predictable Instruction Cache for a Java Processor |
CHES
2008
Springer
13 years 10 months ago
2008
Springer
Bit-slicing is a non-conventional implementation technique for cryptographic software where an n-bit processor is considered as a collection of n 1-bit execution units operating in...
FPL
2007
Springer
14 years 2 months ago
2007
Springer
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
SASP
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The proces...
ISCAPDCS
2003
13 years 10 months ago
2003
Branch predictors and processor front-ends have been the focus of a number of computer architecture studies. Typically they are evaluated separately from other components using tr...
ASPLOS
2009
ACM
14 years 9 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...