264 search results - page 37 / 53 » A Time Predictable Instruction Cache for a Java Processor |
JPDC
2007
13 years 8 months ago
2007
The core of current-generation high-performance multiprocessor systems is out-of-order execution processors with aggressive branch prediction. Despite their relatively high branch...
CODES
2009
IEEE
14 years 16 days ago
2009
IEEE
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...
OSDI
2004
ACM
14 years 9 months ago
2004
ACM
Program-counter-based (PC-based) prediction techniques have been shown to be highly effective and are widely used in computer architecture design. In this paper, we explore the op...
HPCA
2008
IEEE
14 years 9 months ago
2008
IEEE
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...