264 search results - page 39 / 53 » A Time Predictable Instruction Cache for a Java Processor |
RTAS
2005
IEEE
14 years 2 months ago
2005
IEEE
Dynamic voltage and frequency scaling is increasingly being used to reduce the energy requirements of embedded and real-time applications by exploiting idle CPU resources, while s...
JTRES
2010
ACM
13 years 8 months ago
2010
ACM
In order to guarantee that real-time systems meet their timing specification, static execution time bounds need to be calculated. Not considering execution time predictability led...
HPCA
2001
IEEE
14 years 9 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
ASAP
2007
IEEE
14 years 19 days ago
2007
IEEE
Software-based, fine-grain control flow integrity (CFI) validation technique has been proposed to enforce control flow integrity of program execution. By validating every indirect...
TCAD
2002
13 years 8 months ago
2002
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...