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» A Transactional Architecture for Simulation
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DAC
2004
ACM
14 years 11 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
SIGADA
2001
Springer
14 years 3 months ago
Targeting Ada95/DSA for distributed simulation of multiprotocol communication networks
The last years have seen an increasing, albeit restricted simulation of large-scale networks on shared memory parallel platforms. As the complexity of communication protocols and ...
Dhavy Gantsou
ANSS
2004
IEEE
14 years 2 months ago
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
Jie Tao, Josef Weidendorfer
ICDE
2008
IEEE
119views Database» more  ICDE 2008»
15 years 1 days ago
Toward Simulation-Based Optimization in Data Stream Management Systems
Abstract-- Our demonstration introduces a novel system architecture which massively facilitates optimization in data stream management systems (DSMS). The basic idea is to decouple...
Bernhard Seeger, Christoph Heinz, Jürgen Kr&a...
ISCAS
2007
IEEE
202views Hardware» more  ISCAS 2007»
14 years 5 months ago
A VLSI Architecture for a Fast Computation of the 2-D Discrete Wavelet Transform
In this paper, an efficient VLSI architecture for a fast computation of the 2-D discrete wavelet transform (DWT) is proposed. The architecture employing a three-stage cascade in p...
Chengjun Zhang, Chunyan Wang, M. Omair Ahmad