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EKAW
2000
Springer
14 years 1 months ago
Torture Tests: A Quantitative Analysis for the Robustness of Knowledge-Based Systems
Abstract. The overall aim of this paper is to provide a general setting for quantitative quality measures of Knowledge-Based System behavior which is widely applicable to many Know...
Perry Groot, Frank van Harmelen, Annette ten Teije
DATE
2005
IEEE
160views Hardware» more  DATE 2005»
14 years 3 months ago
SOC Testing Methodology and Practice
Abstract—On a commercial digital still camera (DSC) controller chip we practice a novel SOC test integration platform, solving real problems in test scheduling, test IO reduction...
Cheng-Wen Wu
GLVLSI
2002
IEEE
98views VLSI» more  GLVLSI 2002»
14 years 2 months ago
Minimizing concurrent test time in SoC's by balancing resource usage
We present a novel test scheduling algorithm for embedded corebased SoC’s. Given a system integrated with a set of cores and a set of test resources, we select a test for each c...
Dan Zhao, Shambhu J. Upadhyaya, Martin Margala
MIDDLEWARE
2009
Springer
14 years 2 months ago
Automatic Stress Testing of Multi-tier Systems by Dynamic Bottleneck Switch Generation
Abstract. The performance of multi-tier systems is known to be significantly degraded by workloads that place bursty service demands on system resources. Burstiness can cause queu...
Giuliano Casale, Amir Kalbasi, Diwakar Krishnamurt...
SEUS
2007
IEEE
14 years 4 months ago
A Framework for Hardware-in-the-Loop Testing of an Integrated Architecture
In this paper we present a distributed Hardware-in-the-Loop (HiL) simulation approach that supports the verification and validation activities in an integrated architecture as rec...
Martin Schlager, Roman Obermaisser, Wilfried Elmen...