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» A Visual Approach to Validating System Level Designs
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IADIS
2004
13 years 10 months ago
Constructing Scorm Compliant Course Based on High Level Petri Nets
With rapid development of the Internet, e-learning system has become more and more popular. Currently, to solve the issue of sharing and reusing of teaching materials in different...
Jun-Ming Su, Shian-Shyong Tseng, Chia-Yu Chen, Jui...
CSMR
2006
IEEE
14 years 2 months ago
Software Bugs and Evolution: A Visual Approach to Uncover Their Relationship
Versioning systems such as CVS exhibit a large potential to investigate and understand the evolution of large software systems. Bug Reporting systems such as Bugzilla help to unde...
Marco D'Ambros, Michele Lanza
IESS
2007
Springer
143views Hardware» more  IESS 2007»
14 years 3 months ago
Embedded Software Development in a System-Level Design Flow
Abstract System level design is considered a major approach to tackle the complexity of modern System-on-Chip designs. Embedded software within SoCs is gaining importance as it add...
Gunar Schirner, Gautam Sachdeva, Andreas Gerstlaue...
ICSE
2009
IEEE-ACM
14 years 1 months ago
Visual exploration of large-scale evolving software
The comprehensive understanding of today’s software systems is a daunting activity, because of the sheer size and complexity that such systems exhibit. Moreover, software system...
Richard Wettel
DATE
2007
IEEE
145views Hardware» more  DATE 2007»
14 years 3 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...