71 search results - page 7 / 15 » A case for a working-set-based memory hierarchy |
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper investigates the design of parallel algorithmic strategies that address the efficient use of both, memory hierarchies within each processor and a multilevel clustered ...
CODES
2002
IEEE
14 years 1 months ago
2002
IEEE
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
EUROPAR
2006
Springer
14 years 6 days ago
2006
Springer
Abstract. This paper presents a study of performance optimization of dense matrix multiplication on IBM Cyclops-64(C64) chip architecture. Although much has been published on how t...
CASES
2010
ACM
13 years 6 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
VISUALIZATION
1998
IEEE
14 years 24 days ago
1998
IEEE
The key to real-time rendering of large-scale surfaces is to locally adapt surface geometric complexity to changing view parameters. Several schemes have been developed to address...