121 search results - page 19 / 25 » A cell-based power estimation in CMOS combinational circuits |
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper describes two techniques to quantify energy consumption of burst-modeasynchronous(clock-less)controlcircuits. The circuit specifications consideredare extended burst-m...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— We designed a high-efficiency class-E switchedmode power amplifier for a wireless networked micro-sensors system. In this system, where each sensor operates using a mic...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
MJ
2007
13 years 7 months ago
2007
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
GLVLSI
2003
IEEE
14 years 22 days ago
2003
IEEE
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...