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FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
14 years 3 months ago
Mixing buffers and pass transistors in FPGA routing architectures
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
Mike Sheng, Jonathan Rose
ICCS
2001
Springer
14 years 3 months ago
Inclusion-Based Approximate Reasoning
Nowadays, people start to accept fuzzy rule–based systems as flexible and convenient tools to solve a myriad of ill–defined but otherwise (for humans) straightforward tasks s...
Chris Cornelis, Etienne E. Kerre
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
14 years 3 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
SPAA
1998
ACM
14 years 3 months ago
Lamport Clocks: Verifying a Directory Cache-Coherence Protocol
Modern shared-memory multiprocessors use complex memory system implementations that include a variety of non-trivial and interacting optimizations. More time is spent in verifying...
Manoj Plakal, Daniel J. Sorin, Anne Condon, Mark D...
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
14 years 28 days ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy