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ITC
1998
IEEE

Test generation in VLSI circuits for crosstalk noise

14 years 4 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital combinational circuits. These effects are becoming more prevalent due to short signal switching times and deep submicron circuitry. These noise effects can propagate through a circuit and create a logic error in a latch or at a primary output. We first present a new way for predicting the output waveform produced by an inverter due to a non-square wave pulse at its input. Our modeling technique captures such properties as the amplitude of a pulse and its rise/fall times and the delay through a device. To expedite the computation of the response of a logic gate to an input pulse, we have developed a novel way of modeling such gates by an equivalent inverter. We have developed a mixedsignal test generator that incorporates classical PODEM-like static values as well as dynamic signals such as transitions and puls...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
Added 05 Aug 2010
Updated 05 Aug 2010
Type Conference
Year 1998
Where ITC
Authors Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
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