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HASKELL
2006
ACM
14 years 4 months ago
Running the manual: an approach to high-assurance microkernel development
We propose a development methodology for designing and prototyping high assurance microkernels, and describe our application of it. The methodology is based on rapid prototyping a...
Philip Derrin, Kevin Elphinstone, Gerwin Klein, Da...
ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
14 years 4 months ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
ANCS
2005
ACM
14 years 4 months ago
Segmented hash: an efficient hash table implementation for high performance networking subsystems
Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite freq...
Sailesh Kumar, Patrick Crowley
ISLPED
2005
ACM
90views Hardware» more  ISLPED 2005»
14 years 4 months ago
Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices
This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of...
Yingmin Li, Mark Hempstead, Patrick Mauro, David B...
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
14 years 4 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood