1008 search results - page 9 / 202 » A cis-regulatory logic simulator |
IPPS
2000
IEEE
14 years 29 days ago
2000
IEEE
Parallel simulation techniques are often employed to meet the computational requirements of large hardware simulations in order to reduce simulation time. In addition, partitionin...
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
— This paper shows a new type of a cycle-based logic simulation method using a Look-Up Table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascade...
SIGCSE
2009
ACM
14 years 9 months ago
2009
ACM
ion and Extensibility in Digital Logic Simulation Software Richard M. Salter and John L. Donaldson Computer Science Department Oberlin College Oberlin, OH 44074 rms@cs.oberlin.edu,...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
TARK
2007
Springer
14 years 2 months ago
2007
Springer
In this paper we show how coalition logic can be reduced to the fusion of a normal modal STIT logic for agency and a standard normal temporal logic for discrete time, and how this...