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ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
14 years 2 months ago
ECMon: exposing cache events for monitoring
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
Vijay Nagarajan, Rajiv Gupta
CPHYSICS
2010
135views more  CPHYSICS 2010»
13 years 7 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke
ICCAD
2002
IEEE
227views Hardware» more  ICCAD 2002»
14 years 4 months ago
Generic ILP versus specialized 0-1 ILP: an update
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
EMSOFT
2006
Springer
13 years 11 months ago
Reliability mechanisms for file systems using non-volatile memory as a metadata store
Portable systems such as cell phones and portable media players commonly use non-volatile RAM (NVRAM) to hold all of their data and metadata, and larger systems can store metadata...
Kevin M. Greenan, Ethan L. Miller
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 4 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...