78 search results - page 9 / 16 » A code compression advisory tool for embedded processors |
RTAS
2005
IEEE
14 years 1 months ago
2005
IEEE
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
VLSID
1999
IEEE
13 years 12 months ago
1999
IEEE
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
ICIP
2006
IEEE
14 years 1 months ago
2006
IEEE
During the past years, the development of microarray technology has been remarkable, and it is becoming a daily tool in many genomic research laboratories. The widespread adoption...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Modern Application Specific Instruction Set Processors (ASIPs) have customizable caches, where the size, associativity and line size can all be customized to suit a particular ap...
CASES
2001
ACM
13 years 11 months ago
2001
ACM
Abstract. Existing variable-length instruction formats provide higher code densities than fixed-length formats, but are ill-suited to pipelined or parallel instruction fetch and de...