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DAC
2005
ACM
14 years 8 months ago
Power optimal dual-Vdd buffered tree considering buffer stations and blockages
This paper presents the first in-depth study on applying dual Vdd buffers to buffer insertion and multi-sink buffered tree construction for power minimization under delay constrai...
King Ho Tam, Lei He
ASPDAC
2006
ACM
111views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Power distribution techniques for dual VDD circuits
Extensive research has proposed the use of multiple on-die power supplies (VDD) for reducing power consumption in CMOS circuits. We present a detailed study and design techniques ...
Sarvesh H. Kulkarni, Dennis Sylvester
VLSID
2007
IEEE
120views VLSI» more  VLSID 2007»
14 years 8 months ago
Statistical Leakage and Timing Optimization for Submicron Process Variation
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
Yuanlin Lu, Vishwani D. Agrawal
ISLPED
2003
ACM
142views Hardware» more  ISLPED 2003»
14 years 29 days ago
Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
David Nguyen, Abhijit Davare, Michael Orshansky, D...
DAC
2009
ACM
14 years 8 months ago
Power modeling of graphical user interfaces on OLED displays
Emerging organic light-emitting diode (OLED)-based displays obviate external lighting; and consume drastically different power when displaying different colors, due to their emiss...
Mian Dong, Yung-Seok Kevin Choi, Lin Zhong