This paper presents an approach to the analysis of task sets implemented on multiprocessor systems, when the task execution times are specified as generalized probability distrib...
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihi...
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
We present a configuration technique for a Large Area Integrated Circuit (LAIC) which is manufactured by wafer stepping. A LAIC consists of four identical subsystems, i.e., a subs...
Markus Rudack, Michael Redeker, Dieter Treytnar, O...
High-speed serial network interfaces are gaining wide use in connecting multiple processors and peripherals in modern embedded systems, thanks to their size advantage and power ef...