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» A computational architecture for heterogeneous reasoning
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DAC
2000
ACM
14 years 11 months ago
Unifying behavioral synthesis and physical design
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
William E. Dougherty, Donald E. Thomas
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 10 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
SIGMOD
2007
ACM
149views Database» more  SIGMOD 2007»
14 years 10 months ago
Mobile and embedded databases
Recent advances in device technology and connectivity have paved the way for next generation applications that are data-driven, where data can reside anywhere, can be accessed at ...
Anil Nori
MICRO
2007
IEEE
79views Hardware» more  MICRO 2007»
14 years 4 months ago
Time Interpolation: So Many Metrics, So Few Registers
The performance of computer systems varies over the course of their execution. A system may perform well during some parts of its execution and poorly during others. To understand...
Todd Mytkowicz, Peter F. Sweeney, Matthias Hauswir...
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 4 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August