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» A data architecture for consumer RFID applications
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SBCCI
2009
ACM
188views VLSI» more  SBCCI 2009»
14 years 2 months ago
Low-power inter-core communication through cache partitioning in embedded multiprocessors
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
Chenjie Yu, Xiangrong Zhou, Peter Petrov
ICMCS
2006
IEEE
185views Multimedia» more  ICMCS 2006»
14 years 1 months ago
DMB (Digital Multimedia Broadcasting) Voice EPG Application
Recently, mobile TV is becoming a mainstream service in mobile broadcasting scenario, where requires lots of mobile factors such as robust transmission, high performance and easy ...
Bong-Ho Lee, So Park, Heejeong Kim, Chung-Hyun Ahn...
DAC
2002
ACM
14 years 8 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
ICCD
2003
IEEE
129views Hardware» more  ICCD 2003»
14 years 4 months ago
Reducing dTLB Energy Through Dynamic Resizing
Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant ...
Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubr...
SIGOPS
2010
130views more  SIGOPS 2010»
13 years 5 months ago
Storing and accessing live mashup content in the cloud
Today’s Rich Internet Application (RIA) technologies such as Ajax, Flex, or Silverlight, are designed around the client-server paradigm and cannot easily take advantage of repli...
Krzysztof Ostrowski, Ken Birman