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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 5 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband
ICCAD
2003
IEEE
170views Hardware» more  ICCAD 2003»
14 years 5 months ago
Evaluation of Placement Techniques for DNA Probe Array Layout
DNA probe arrays have emerged as a core genomic technology that enables cost-effective gene expression monitoring, mutation detection, single nucleotide polymorphism analysis and ...
Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu ...
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 5 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
WWW
2010
ACM
14 years 3 months ago
Inferring relevant social networks from interpersonal communication
Researchers increasingly use electronic communication data to construct and study large social networks, effectively inferring unobserved ties (e.g. i is connected to j) from obs...
Munmun De Choudhury, Winter A. Mason, Jake M. Hofm...
WISEC
2010
ACM
14 years 3 months ago
Timing-based localization of in-band wormhole tunnels in MANETs
The problem of localizing in-band wormhole tunnels in MANETs is considered. In an in-band wormhole attack, colluding attackers use a covert tunnel to create the illusion that two ...
Jinsub Kim, Dan Sterne, Rommie Hardy, Roshan K. Th...
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