Sciweavers

1013 search results - page 104 / 203
» A hardware implementation of realloc function
Sort
View
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 2 months ago
Exploiting structure in an AIG based QBF solver
—In this paper we present a procedure for solving quantified boolean formulas (QBF), which uses And-Inverter Graphs (AIGs) as the core data-structure. We make extensive use of s...
Florian Pigorsch, Christoph Scholl
DATE
2009
IEEE
141views Hardware» more  DATE 2009»
14 years 2 months ago
How to speed-up your NLFSR-based stream cipher
— Non-Linear Feedback Shift Registers (NLFSRs) have been proposed as an alternative to Linear Feedback Shift Registers (LFSRs) for generating pseudo-random sequences for stream c...
Elena Dubrova
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 2 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
SIGCOMM
2009
ACM
14 years 2 months ago
Design of a network service processing platform for data path customization
Custom packet processing functionality in routers is one of the key characteristics of next-generation Internet architectures. Network services have been proposed as an abstractio...
Qiang Wu, Tilman Wolf
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 2 months ago
Fast positive-real balanced truncation of symmetric systems using cross Riccati equations
We present a computationally efficient implementation of positive-real balanced truncation (PRBT) for symmetric multiple-input multiple-output (MIMO) systems. The solution of a p...
Ngai Wong