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TVLSI
2008
123views more  TVLSI 2008»
13 years 7 months ago
Cost-Efficient SHA Hardware Accelerators
Abstract--This paper presents a new set of techniques for hardware implementations of Secure Hash Algorithm (SHA) hash functions. These techniques consist mostly in operation resch...
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Sta...
GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
13 years 11 months ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...
IPPS
2006
IEEE
14 years 1 months ago
Implementation of a reconfigurable hard real-time control system for mechatronic and automotive applications
Control algorithms implemented directly in hardware take advantage of parallel signal processing. Furthermore, implementing controller functionality in reconfigurable hardware fac...
Steffen Toscher, Roland Kasper, Thomas Reinemann
IPPS
2005
IEEE
14 years 1 months ago
IPSec Implementation on Xilinx Virtex-II Pro FPGA and Its Application
In this paper, we propose an IPSec implementation on Xilinx Virtex-II Pro FPGA1 . We move the key management and negotiation into software function calls that run on the PowerPC p...
Jing Lu, John W. Lockwood
FPL
2009
Springer
115views Hardware» more  FPL 2009»
14 years 11 days ago
Recursion in reconfigurable computing: A survey of implementation approaches
Reconfigurable systems are widely used nowadays to increase performance of computationally intensive applications. There exist a lot of synthesis tools that automatically generate...
Iouliia Skliarova, Valery Sklyarov