Sciweavers

1013 search results - page 120 / 203
» A hardware implementation of realloc function
Sort
View
ICCD
2005
IEEE
108views Hardware» more  ICCD 2005»
14 years 5 months ago
Methods for Modeling Resource Contention on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and cache...
Tipp Moseley, Dirk Grunwald, Joshua L. Kihm, Danie...
ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
14 years 5 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
ISW
2009
Springer
14 years 2 months ago
MAC Precomputation with Applications to Secure Memory
We present ShMAC (Shallow MAC), a fixed input length message authentication code that performs most of the computation prior to the availability of the message. Specifically, Sh...
Juan A. Garay, Vladimir Kolesnikov, Rae McLellan
GLOBECOM
2008
IEEE
14 years 2 months ago
Duty-Cycle Optimization in Unslotted 802.15.4 Wireless Sensor Networks
—We present a novel approach for minimizing the energy consumption of medium access control (MAC) protocols developed for duty-cycled wireless sensor networks (WSN) for the unslo...
Sinem Coleri Ergen, Carlo Fischione, Dimitri Maran...
FPL
2007
Springer
106views Hardware» more  FPL 2007»
14 years 2 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...