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FPL
2008
Springer
110views Hardware» more  FPL 2008»
13 years 9 months ago
Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip
While there have been many reported implementations of Networks-on-Chip (NoCs) on FPGAs, they have not seen the same acceptance as NoCs on ASICs. One reason is that communication ...
Matthew Shelburne, Cameron Patterson, Peter Athana...
JCP
2008
97views more  JCP 2008»
13 years 8 months ago
Profiling Tools for FPGA-Based Embedded Systems: Survey and Quantitative Comparison
Profiling tools are computer-aided design (CAD) tools that help in determining the computationally intensive portions in software. Embedded systems consist of hardware and software...
Jason G. Tong, Mohammed A. S. Khalid
SIGMETRICS
2008
ACM
13 years 8 months ago
DRAM is plenty fast for wirespeed statistics counting
Per-flow network measurement at Internet backbone links requires the efficient maintanence of large arrays of statistics counters at very high speeds (e.g. 40 Gb/s). The prevailin...
Bill Lin, Jun (Jim) Xu
VLSID
2003
IEEE
82views VLSI» more  VLSID 2003»
14 years 8 months ago
SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs
We propose a non-intrusive methodology for concurrent fault detection in FSMs. The proposed method is similar to duplication, wherein a replica of the circuit acts as a predictor ...
Petros Drineas, Yiorgos Makris
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 5 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...