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MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
14 years 2 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
SAMOS
2007
Springer
14 years 2 months ago
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications
—This paper describes the design of a programmable coprocessor for Public Key Cryptography (PKC) on an FPGA. The implementation provides a very broad range of functions together ...
Nele Mentens, Kazuo Sakiyama, Lejla Batina, Bart P...
IPPS
2000
IEEE
14 years 10 days ago
Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 4 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
DATE
2009
IEEE
178views Hardware» more  DATE 2009»
14 years 2 months ago
Correct-by-construction generation of device drivers based on RTL testbenches
Abstract—The generation of device drivers is a very time consuming and error prone activity. All the strategies proposed up to now to simplify this operation require a manual, ev...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...