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ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
14 years 2 months ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
ARCS
2004
Springer
14 years 1 months ago
Modelling Cryptonite - On the Design of a Programmable High-Performance Crypto Processor
: Cryptographic algorithms – even when designed for easy implementability on general purpose architectures – still show a huge performance gap between implementations in softwa...
Rainer Buchty
ITC
2000
IEEE
123views Hardware» more  ITC 2000»
14 years 10 days ago
Combinational logic synthesis for diversity in duplex systems
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
Subhasish Mitra, Edward J. McCluskey
ICCD
1999
IEEE
88views Hardware» more  ICCD 1999»
14 years 8 days ago
TriMedia CPU64 Application Development Environment
The architecture of the TriMedia CPU64 is based on the TM1000 DSPCPU. The original VLIW architecture has been extended with the concepts of vector processing and superoperations. ...
Evert-Jan D. Pol, Bas Aarts, Jos T. J. van Eijndho...
MICRO
1997
IEEE
110views Hardware» more  MICRO 1997»
14 years 5 days ago
The Design and Performance of a Conflict-Avoiding Cache
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
Nigel P. Topham, Antonio González, Jos&eacu...