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DAC
2002
ACM
14 years 9 months ago
Scheduler-based DRAM energy management
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
14 years 29 days ago
Efficient High-Level modeling in the networking domain
-- Starting Electronic System Level (ESL) design flows with executable High-Level Models (HLMs) has the potential to sustainably improve productivity. However, writing good HLMs fo...
Christian Zebelein, Joachim Falk, Christian Haubel...
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 3 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
FPL
2010
Springer
180views Hardware» more  FPL 2010»
13 years 6 months ago
A Karatsuba-Based Montgomery Multiplier
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...
Gary Chun Tak Chow, Ken Eguro, Wayne Luk, Philip L...