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DSD
2006
IEEE
131views Hardware» more  DSD 2006»
14 years 27 days ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn
FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
14 years 25 days ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith
PODC
1995
ACM
14 years 23 days ago
A Framework for Protocol Composition in Horus
The Horus system supports a communication architecture ats protocols as instances of an abstract data type. This approach encourages developers to partition complex protocols into...
Robbert van Renesse, Kenneth P. Birman, Roy Friedm...
AAAI
2008
13 years 11 months ago
Spatial Scaffolding for Sociable Robot Learning
Spatial scaffolding is a naturally occurring human teaching behavior, in which teachers use their bodies to spatially structure the learning environment to direct the attention of...
Cynthia Breazeal, Matt Berlin
CIDR
2007
156views Algorithms» more  CIDR 2007»
13 years 10 months ago
SwissQM: Next Generation Data Processing in Sensor Networks
Sensor networks are becoming an important part of the IT landscape. Existing systems, however, are limited in two fundamental ways: lack of data independence, and poor integration...
René Müller, Gustavo Alonso, Donald Ko...