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» A high performance JPEG2000 architecture
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DAC
2008
ACM
13 years 9 months ago
Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...
Min Ni, Seda Ogrenci Memik
EUMAS
2006
13 years 9 months ago
A Customizable Multi-Agent System for Distributed Data Mining
We present a general Multi-Agent System framework for distributed data mining based on a Peer-toPeer model. The framework adopts message-based asynchronous communication and a dyn...
Giancarlo Fortino, Giuseppe Di Fatta
LISA
2003
13 years 9 months ago
Using Service Grammar to Diagnose BGP Configuration Errors
Often network components work correctly, yet end-to-end services don’t. This happens if configuration parameters of components are set to incorrect values. Configuration is a fu...
Xiaohu Qie, Sanjai Narain
CAL
2008
13 years 7 months ago
BENoC: A Bus-Enhanced Network on-Chip for a Power Efficient CMP
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
I. Walter, Israel Cidon, Avinoam Kolodny
IJPP
2006
145views more  IJPP 2006»
13 years 7 months ago
Deterministic Parallel Processing
Abstract. In order to address the problems faced in the wireless communications domain, picoChip has devised the picoArrayTM . The picoArrayTM is a tiled-processor architecture, co...
Gajinder Panesar, Daniel Towner, Andrew Duller, Al...