2209 search results - page 416 / 442 » A high performance JPEG2000 architecture |
CHES
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. This paper discusses the state-of-the-art fast software implementation of block ciphers on Intel’s new microprocessor Core2, particularly concentrating on “bitslice i...
IPSN
2007
Springer
14 years 1 months ago
2007
Springer
In this paper we present Beacon Location Service (BLS): a location service for beacon-based routing algorithms like Beacon Vector Routing (BVR) [8] and S4 [19] . The role of a loc...
ISPASS
2006
IEEE
14 years 1 months ago
2006
IEEE
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
ANCS
2006
ACM
14 years 1 months ago
2006
ACM
Buffered crossbar switches are a special type of crossbar switches. In such a switch, besides normal input queues and output queues, a small buffer is associated with each crosspo...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...