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CLUSTER
2006
IEEE
14 years 4 months ago
Improving the Performance of Cluster Applications through I/O Proxy Architecture
Clusters are the most common solutions for high performance computing at the present time. In this kind of systems, an important challenge is the I/O subsystem design. Typically, ...
Luis Miguel Sánchez, Florin Isaila, Alejand...
3DIC
2009
IEEE
169views Hardware» more  3DIC 2009»
14 years 3 months ago
3-D memory organization and performance analysis for multi-processor network-on-chip architecture
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...
Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerase...
TCAD
2010
154views more  TCAD 2010»
13 years 4 months ago
Performance-Driven Dual-Rail Routing Architecture for Structured ASIC Design Style
In recent years, structured application-specific integrated circuit (ASIC) design style has lessened the importance of mask cost. Multiple structured ASIC chip designs share the sa...
Fu-Wei Chen, Yi-Yu Liu
CONPAR
1994
14 years 2 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
ISCAS
2008
IEEE
287views Hardware» more  ISCAS 2008»
14 years 4 months ago
A high speed word level finite field multiplier using reordered normal basis
— Reordered normal basis is a certain permutation of a type II optimal normal basis. In this paper, a high speed design of a word level finite field multiplier using reordered ...
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmad...