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» A high performance JPEG2000 architecture
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ICMCS
2006
IEEE
121views Multimedia» more  ICMCS 2006»
14 years 4 months ago
Acoustic Echo Cancelation for High Noise Environments
Acoustic echo cancellation (AEC) is highly imperative for enhanced communication in noisy environments such as a car or a conference room. In this work, we present a dualstructure...
Amit Chhetri, Jack W. Stokes, Dinei A. F. Flor&eci...
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
13 years 1 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
DAC
2007
ACM
14 years 11 months ago
Shared Resource Access Attributes for High-Level Contention Models
Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of indiv...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
CCS
2011
ACM
12 years 10 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
GLVLSI
2010
IEEE
189views VLSI» more  GLVLSI 2010»
14 years 3 months ago
8Gb/s capacitive low power and high speed 4-PWAM transceiver design
In this paper, capacitive 4-PWAM transmitter architectures and circuits are proposed and its performances are analyzed with random jitter and PVT variation comparing with other wo...
Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi