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» A linear implementation of PACMAN
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ARC
2008
Springer
115views Hardware» more  ARC 2008»
13 years 9 months ago
A High Throughput FPGA-based Floating Point Conjugate Gradient Implementation
As Field Programmable Gate Arrays (FPGAs) have reached capacities beyond millions of equivalent gates, it becomes possible to accelerate floating-point scientific computing applica...
Antonio Roldao Lopes, George A. Constantinides
ICCAD
2004
IEEE
83views Hardware» more  ICCAD 2004»
14 years 4 months ago
Custom-optimized multiplierless implementations of DSP algorithms
Linear DSP kernels such as transforms and filters are comprised exclusively of additions and multiplications by constants. These multiplications may be realized as networks of ad...
Markus Püschel, Adam C. Zelinski, James C. Ho...
DAC
2008
ACM
14 years 8 months ago
Formal datapath representation and manipulation for implementing DSP transforms
We present a domain-specific approach to representing datapaths for hardware implementations of linear signal transform algorithms. We extend the tensor structure for describing l...
Franz Franchetti, James C. Hoe, Markus Püsche...
ICC
2007
IEEE
109views Communications» more  ICC 2007»
14 years 2 months ago
Design Linear Multiuser Transmitters from Linear Multiuser Receivers
— Novel concepts are introduced for finding the relationship between multiuser detection (MUD) and multiuser transmission (MUT), so that the study in MUT can benefit from the w...
Lie-Liang Yang
SC
2009
ACM
14 years 2 months ago
Implementing sparse matrix-vector multiplication on throughput-oriented processors
Sparse matrix-vector multiplication (SpMV) is of singular importance in sparse linear algebra. In contrast to the uniform regularity of dense linear algebra, sparse operations enc...
Nathan Bell, Michael Garland