Sciweavers

76 search results - page 4 / 16
» A localizing directory coherence protocol
Sort
View
MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
14 years 1 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
ICPP
1994
IEEE
13 years 11 months ago
A Distributed Cache Coherence Protocol for Hypercube Multiprocessors
- This paper proposes a distributed directory cache coherence protocol and compares the performance of the proposed protocol with fully mapped and single linked list protocols for ...
Yeimkuan Chang, Laxmi N. Bhuyan, Akhilesh Kumar
ACSC
2004
IEEE
13 years 11 months ago
Verification of the Futurebus+ Cache Coherence protocol: A case study in model checking
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
Kylie Williams, Robert Esser
CDES
2008
166views Hardware» more  CDES 2008»
13 years 9 months ago
Scalable Directory Organization for Tiled CMP Architectures
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...
Alberto Ros, Manuel E. Acacio, José M. Garc...
ISCA
2003
IEEE
104views Hardware» more  ISCA 2003»
14 years 27 days ago
Token Coherence: Decoupling Performance and Correctness
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
Milo M. K. Martin, Mark D. Hill, David A. Wood