508 search results - page 53 / 102 » A logical account of pspace |
FIDJI
2004
Springer
14 years 1 months ago
2004
Springer
We present a calculus for establishing non-interference of several Java threads running in parallel. The proof system is built atop an implemented sequential Java Dynamic Logic cal...
ICCAD
1999
IEEE
13 years 12 months ago
1999
IEEE
A common approach to performance optimization of circuits focuses on re-synthesis to reduce the length of all paths greater than the desired delay . We describe a new delay optimi...
DFT
1998
IEEE
13 years 12 months ago
1998
IEEE
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
ICGI
1998
Springer
13 years 12 months ago
1998
Springer
In this paper, we propose a new framework for the computational learning of formal grammars with positive data. In this model, both syntactic and semantic information are taken int...
ICCAD
1997
IEEE
13 years 12 months ago
1997
IEEE
We describe a highly accurate but e cient fault simulator for interconnect opens, based on characterizing the standard cell library with SPICE; using transistor charge equations f...