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» A low voltage CMOS current source
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DATE
2006
IEEE
95views Hardware» more  DATE 2006»
14 years 1 months ago
Two-phase resonant clocking for ultra-low-power hearing aid applications
Resonant clocking holds the promise of trading speed for energy in CMOS circuits that can afford to operate at low frequency, like hearing aids. An experimental chip with 110k tra...
Flavio Carbognani, Felix Bürgin, Norbert Felb...
CCECE
2006
IEEE
14 years 1 months ago
A High-Speed Low-Power Rail-to-Rail Buffer Amplifier for LCD Application
A high-speed low-power rail-to-rail class-B buffer amplifier, which is suitable for liquid crystal display applications, is proposed. The summing circuit is biased by the constant...
Chih-Wen Lu, Peter H. Xiao
GLVLSI
2006
IEEE
145views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Leakage current starved domino logic
A new circuit technique based on a single PMOS sleep transistor and a dual threshold voltage CMOS technology is proposed in this paper for simultaneously reducing subthreshold and...
Zhiyu Liu, Volkan Kursun
ISCAS
2007
IEEE
113views Hardware» more  ISCAS 2007»
14 years 2 months ago
Design Considerations for Future RF Circuits
TheRFdesignparadigm will changesignificantly asCMOS technology scales and integration levels rise to accommodate multi-band, multi-mode transceivers and baseband processors. This...
Behzad Razavi
ISCAS
2011
IEEE
210views Hardware» more  ISCAS 2011»
12 years 11 months ago
A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test
—A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an a...
Rajath Vasudevamurthy, Pratap Kumar Das, Bharadwaj...