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» A memory system design framework: creating smart memories
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FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
14 years 1 months ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
14 years 2 months ago
Performance pathologies in hardware transactional memory
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Y...
MICRO
1997
IEEE
82views Hardware» more  MICRO 1997»
13 years 12 months ago
Procedure Based Program Compression
Cost and power consumption are two of the most important design factors for many embedded systems, particularly consumer devices. Products such as Personal Digital Assistants, pag...
Darko Kirovski, Johnson Kin, William H. Mangione-S...
IJDE
2006
95views more  IJDE 2006»
13 years 7 months ago
Exploiting the Rootkit Paradox with Windows Memory Analysis
Rootkits are malicious programs that silently subvert an operating system to hide an intruder's activities. Although there are a number of tools designed to detect rootkits, ...
Jesse D. Kornblum
PPOPP
2006
ACM
14 years 1 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...