155 search results - page 21 / 31 » A new heuristic algorithm for reversible logic synthesis |
FPL
2005
Springer
14 years 1 months ago
2005
Springer
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
1 In this paper, we propose a hybrid approach for estimating the switching activities of the internal nodes in logic circuits. The new approach combines the advantages of the simul...
KCAP
2003
ACM
14 years 22 days ago
2003
ACM
While existing learning techniques can be viewed as inducing programs from examples, most research has focused on rather narrow classes of programs, e.g., decision trees or logic ...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Boolean functions are fundamental to synthesis and verification of digital logic, and compact representations of Boolean functions have great practical significance. Popular repre...
CODES
2003
IEEE
14 years 24 days ago
2003
IEEE
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...