155 search results - page 24 / 31 » A new heuristic algorithm for reversible logic synthesis |
ASPDAC
2004
ACM
14 years 27 days ago
2004
ACM
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
We introduce streaming data string transducers that map input data strings to output data strings in a single left-to-right pass in linear time. Data strings are (unbounded) seque...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
Application-specific instructions can significantly improve the performance, energy, and code size of configurable processors. A common approach used in the design of such instruc...
ILP
2004
Springer
14 years 25 days ago
2004
Springer
For the last ten years a lot of work has been devoted to propositionalization techniques in relational learning. These techniques change the representation of relational problems t...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
We study a new placement problem: the reproducing placement problem (RPP). In each phase a module (or gate) is decomposed into two (or more) simpler modules. The goal is nd a \go...