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HIPC
2000
Springer
13 years 11 months ago
Improving Offset Assignment on Embedded Processors Using Transformations
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
EURODAC
1995
IEEE
195views VHDL» more  EURODAC 1995»
13 years 11 months ago
A hardware/software partitioning algorithm for pipelined instruction set processor
This paper proposes a new method to design an optimal instruction set for pipelined ASIP development using a formal HW/SW codesign methodology. The codesign task addressed in this...
Binh Ngoc Nguyen, Masaharu Imai, Nobuyuki Hikichi
ICCAD
2001
IEEE
101views Hardware» more  ICCAD 2001»
14 years 4 months ago
Instruction Generation for Hybrid Reconfigurable Systems
In this work, we present an algorithm for simultaneous template generation and matching. The algorithm profiles the graph and iteratively contracts edges to create the templates. ...
Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzad...
SIGCSE
2000
ACM
155views Education» more  SIGCSE 2000»
14 years 4 days ago
A study of common pitfalls in simple multi-threaded programs
It is generally acknowledged that developing correct multithreaded codes is difficult, because threads may interact with each other in unpredictable ways. The goal of this work i...
Sung-Eun Choi, E. Christopher Lewis
ISPAN
2000
IEEE
14 years 5 days ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras