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» A note on circuit lower bounds from derandomization
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SPAA
2004
ACM
14 years 2 months ago
Lower bounds for graph embeddings and combinatorial preconditioners
Given a general graph G, a fundamental problem is to find a spanning tree H that best approximates G by some measure. Often this measure is some combination of the congestion and...
Gary L. Miller, Peter C. Richter
TVLSI
1998
81views more  TVLSI 1998»
13 years 8 months ago
Maximum power estimation for CMOS circuits using deterministic and statistical approaches
— Excessive instantaneous power consumption may reduce the reliability and performance of VLSI chips. Hence, to synthesize circuits with high reliability, it is imperative to ef...
Chuan-Yu Wang, Kaushik Roy
COCO
2005
Springer
130views Algorithms» more  COCO 2005»
13 years 10 months ago
Pseudorandom Bits for Constant Depth Circuits with Few Arbitrary Symmetric Gates
We exhibit an explicitly computable ‘pseudorandom’ generator stretching l bits into m(l) = lΩ(log l) bits that look random to constant-depth circuits of size m(l) with log m...
Emanuele Viola
CIE
2007
Springer
14 years 2 months ago
Circuit Complexity of Regular Languages
We survey our current knowledge of circuit complexity of regular languages and we prove that regular languages that are in AC0 and ACC0 are all computable by almost linear size ci...
Michal Koucký
DATE
2003
IEEE
116views Hardware» more  DATE 2003»
14 years 1 months ago
Statistical Timing Analysis Using Bounds
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
Aseem Agarwal, David Blaauw, Vladimir Zolotov, Sar...